RadiSys 68-0061-10自動(dòng)化控制模塊
1.產(chǎn) 品 資 料 介 紹：
中文資料：
基本操作網(wǎng)絡(luò)中的每個(gè)節(jié)點(diǎn)（RadiSys 68-0061-10反射內(nèi)存板）使用菊花鏈環(huán)路中的光纖電纜互連。第一塊板的發(fā)射器必須連接到第二塊板的接收器上。第二板的發(fā)射器連接到第三板的接收器，依此類推，直到在第一板的接收器處完成環(huán)路。每個(gè)節(jié)點(diǎn)都必須有一個(gè)唯一的節(jié)點(diǎn)ID，這是使用一組八（8）個(gè)板載交換機(jī)來(lái)實(shí)現(xiàn)的。節(jié)點(diǎn)ID的順序并不重要；它們只需要是唯一的（即沒(méi)有兩個(gè)節(jié)點(diǎn)可以具有相同的節(jié)點(diǎn)ID）。
網(wǎng)絡(luò)上的數(shù)據(jù)傳輸是由VMEbus主機(jī)系統(tǒng)對(duì)板載SDRAM的寫(xiě)入啟動(dòng)的。寫(xiě)入可以像VMEbus寫(xiě)入一樣簡(jiǎn)單，也可以是由于DMA引擎的循環(huán)造成的。當(dāng)對(duì)SDRAM進(jìn)行寫(xiě)入時(shí)，RadiSys 68-0061-10上的電路會(huì)自動(dòng)將數(shù)據(jù)以及其他相關(guān)信息寫(xiě)入發(fā)送FIFO。
英文資料：
Basic Operation Each node (RadiSys 68-0061-10 Reflective Memory boards) in the network is interconnected using fiber-optic cables in a daisy chain loop. The transmitter of the first board must be tied to the receiver of the second board. The transmitter of the second board is tied to the receiver of the third, and so on, until the loop is completed back at the receiver of the first board. Each node must have a unique node ID, which is accomplished using a bank of eight (8) on-board switches. The order of the node IDs is unimportant; they just have to be unique (i.e. no two nodes can have the same node ID).
A transfer of data over the network is initiated by a write to on-board SDRAM from the VMEbus host system. The write can be as simple as a VMEbus write, or it can be due to a cycle by the DMA engine. When the write to the SDRAM is occurring, circuitry on the RadiSys 68-0061-10 automatically writes the data, along with other pertinent information, into the transmit FIFO.
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